Fine patterning techniques using nanoimprint technology are also effective for improving the luminous efficiency of LEDs and organic ELs. Toshiba Machine Co., Ltd. has developed a technology that can increase the luminous efficiency of LEDs by 20 to 30%, including special imprinting devices (Fig. 7). It is said that the "PSS" (Patterned Sapphire Substrate) which forms a concave-convex pattern on the surface of the sapphire substrate improves the reflectance and the like, thereby improving the light-emitting output.
Figure 7: Increasing the luminous efficiency of LEDs at low cost
The picture shows the technology and equipment (a ~ d) developed by Toshiba Machinery to improve the luminous efficiency of LEDs. A nano-imprint technique is used to form a pattern on a sapphire substrate on which GaN crystals are grown, thereby improving reflectance, reducing crystal defects, and the like. The luminous efficiency of LEDs is increased by 20 to 30%. In addition, low-cost and high-quality are achieved by volume-to-roll production of molds. (Photo: Toshiba Machine)
The problem is how to reduce the number of defects in the mold and how to make the cost more advantageous when forming a pattern with an existing stepper. “The substrate is defective, and the LED will not emit light. In order to reduce the cost, the mold will be used repeatedly, and the defects will be more and more†(Toshiba Boss, Deputy Business Director of Toshiba Machine Nano-Processing System Business Unit).
The company's response to these two issues is to make a one-off product from a resin mold that is largely replicated using the R2R method. "The goal of reducing the cost of a 4-inch wafer to less than $5 is already eye-catching" (Goto). Another advantage of resin molds is that they are suitable for sapphire substrates that are not necessarily flat.
Achieve high quality GaN crystals
Recently, there has also been the possibility of further improving the efficiency of LEDs using nanoimprint technology. The research institutes of Furukawa Machinery Metal, Kanazawa Institute of Technology, Toshiba Machine, and Waseda University, Shui Yerun, used nanoimprint technology to develop a method to reduce the dislocation* of GaN crystals to about 1% (Fig. 8).
Figure 8: The production of high quality GaN crystals is also very active
The picture shows high-quality GaN crystals based on nanoimprint technology, such as Shuiye Run Research Laboratory of Waseda University and Furu Machinery Metal. The dislocations are greatly reduced by blocking the crystal growth of GaN with the cracked SiO2 layer. (Photo: Waseda University)
*Dislocation: A linear defect contained in the crystal. Previously, the dislocation density of the GaN crystal was as high as 1 × 10 9 /cm 2 or more, which was considered to be a cause of a decrease in luminous efficiency when a large current flows to the LED.
The specific method is as follows: first, a SiO2 film is formed on the original GaN crystal, and a small opening of several tens of nm width is formed by a nanoimprint technique; then the GaN crystal is grown again. Thus, dislocations of the GaN crystal under the SiO2 film do not reach the upper GaN crystal, thereby reducing dislocations of the upper GaN crystal. Professor Mizuno of Waseda University said, "We have tried LEDs to confirm that this technology can increase output power and extend life. It should also be used for power semiconductors."
Mizuno said that the technology is also expected to reduce the driving voltage of LEDs. "Because of the small number of dislocations, GaN crystals that previously had to reach a thickness of 140 μm can be greatly reduced to less than 21 μm."
Significant progress in solving technical problems
In the field of semiconductor manufacturing, nano-imprint technology has experienced the possibility of practical use after a long winter. Previously, this technology could not surpass existing lithography in terms of cost and mass production. However, in the field of resolution below 20 nm, very expensive techniques such as EUV lithography are required, so nanoimprint may be reversed. Moreover, nanoimprint technology itself has made significant progress in the past three years or so (Figure 9).
Figure 9: Rapid resolution of technical issues in the semiconductor field
The picture shows MII's recent technical improvements. In the two years from February 2011, the defect density during mass production was significantly reduced (a). The yield of the line pattern having a half pitch of 26 nm is also increased to 90% or more at the length of 10 m (b). (The tables and figures are provided by MII)
MII's nanoimprinting device, which is intended to manufacture NAND flash memory, reduced the number of replica mold defects of 5/cm2 in September 2012 to 3/cm2 in less than half a year. According to the introduction of the Japanese printing of molds to MII, "in February 2014, it was reduced to 1.2/cm2". The yield of fine patterns has also increased dramatically in less than three years.
The solution to the problem of low processing power (throughput) has gradually surfaced. Japan's Industrial Technology Research Institute, Tohoku University, and Hyogo Prefectural University have developed techniques for imprinting and suppressing bubble defects in a Freon-substituted gas that is easily condensed (Fig. 10). This technology greatly improves the coating speed of the resin, "100 wafers can be imprinted in one hour, and one mold can be used 20,000 times" (Guangzhou Yang, deputy research center of the Integrated Microsystems Research Center of the Industrial Technology Research Institute). This is equivalent to 5 to 10 times the throughput of MII's recent technology.
Figure 10: Production efficiency is expected to increase significantly
The picture shows an overview of the photo nanoimprint method using condensed gas jointly developed by the Industrial Technology Research Institute and the Tohoku University. By using a condensing gas at the time of nanoimprinting, the bubbles are liquefied, so that defects (a, b) do not occur. A major issue in MII's technology - throughput, is expected to be more than five times the original (c). (Photos and tables are provided by the Industrial Technology Research Institute).
Apps on the hard drive will be decided in 2015
The application of nanoimprint technology on HDD hard drives has also shown signs of recovery (Figure 11).
Figure 11: The application of HDD hard disk field will be decided in 2015
Regarding the application of nanoimprinting in the field of hard disks, there is basically no possibility of discrete tracks (a). HGST successfully formed a dot pattern with a diameter of 10 nm by combining polymer self-organizing technology and nanoimprint technology in 2015. (Photo: HGST)
Regarding the previously anticipated application in the field of discrete orbit*, this approach has not been realized. There is still the possibility of application in the field of Bit Patterned Media*. HGST announced in 2013 that it will be practically combined with nanoimprint technology and self-organizing technology. “2015 will be a crucial year for practical use†(a researcher at a nanoimprint technology).
The PV Charge Controller works as a voltage regulator, its primary function is to prevent the Battery from being overcharged by the P.V array, being overly discharged by the load, or both.
Controller types:
• Single Stage controllers:
This type of controllers prevents battery overcharging by switching the PV array off when the battery voltage reaches the state of charge set point. The array and battery are automatically reconnected when the battery voltage reaches a lower value called the charge resumption.
• Pulse Width Modulation (PWM) controllers:
PWM controllers are the most common controller on the market today. These charge the battery by rapidly switching the full charging current on and off when the battery reaches a fully charged state. The length of the charging current pulse gradually decreases as battery voltage rises, reducing the average current into the battery.
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